Napatech and Intel Partner on FPGA Technology for Standard Servers

The big hyperscalers use field programmable gate array (FPGA) technology on standard servers in their data centers. But there’s a trend for other enterprises to emulate these hyperscalers. And today, Napatech and Intel announced they’ve combined some technology for Intel to offer an FPGA programmable acceleration card for standard servers. An FPGA is an integrated circuit designed to be configured by a customer after manufacturing, providing a certain level of programmability. “Intel made an effort to make FPGA smart NICs [network interface cards] pervasive even in standard servers,” said Jarrod Siket, Napatech’s chief marketing officer. Intel’s foray into the FPGA realm accelerated in 2015 with its acquisition of Altera for $16.7 billion. Napatech’s Siket said, “Today, we took our FPGA software and made it available in Intel programmable acceleration cards.” Napatech is a manufacturer of smart NICS, traditionally providing both the hardware and software to original equipment manufacturers (OEMs) such as Netscout and Cisco. In its work with Intel, Napatech is providing its FPGA Smart NIC software and Intel is providing its Programmable Acceleration Card with Intel Arria 10 GX FPGA.The solution offloads the most burdensome network and security processing workloads from the server’s Intel Xeon CPU cores, freeing up valuable compute resources for applications and services.Siket said that in the past an engineering team would be required to take advantage of FPGA technology. “But Intel is making it easy to access for end users of all types,” he said.For Napatech, this opens up a new market for its FPGA SmartNIC software as more enterprises and telecom networks deploy network and security applications on standard servers. “There are some needs that are more networking-intense and require acceleration, and that’s where smart NICs come along,” said Siket. He added that there were a few different technologies for acceleration, including special processors and ASICs, but FPGA has emerged as the preferred method.